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Near-Threshold Computing

Abstract

As the IC technology is advancing, larger amounts of transistors are fitted on single IC chips. More complicated chips are able to execute more calculations at a given time period, but higher activity uses more energy and that generates heat. The excessive heat limits the activity of the chips. Therefore, there is a continuous demand for techniques that enable the same operations with lower energy consumption. Very small devices that can be used to monitor human activities, buildings, bridges and so on are a new field of study which also needs low energy solutions, as the devices must be able to operate long periods of time without charging the batteries.

The Near-Threshold Computing is a technique for reducing the energy consumption of IC devices. The principle in the Near-Threshold Computing is to use lower supply volt- age than the nominal, which the chip manufacturer has originally designed. This slows devices down and makes them unreliable. However, if these drawbacks can be tolerated energy savings can be achieved.

In this study, different aspects of the Near-Threshold Computing are discussed, first by exploring previous research in the literature, and then by conducting two case studies to research applying Near-Threshold Computing technique for two CMOS devices.

In the case studies, an FO4 inverter and a 6T SRAM were investigated by simulations. The behavior of these devices in the Near-Threshold Computing voltages can be consid- ered covering a large portion of a conventional IC chip area and energy usage. A 130 nm technology was used. Actual manufacturing process products were modelled by running multiple Monte Carlo simulations. When this technology that has a low price point is combined with the Near-Threshold Computing technique, it is possible to produce rea- sonably priced low-power devices.

In this study, The Near Threshold Computing technique is shown to drop the energy usage significantly. On the other hand, the devices operate slower and the widely used 6T SRAM cells become unreliable. As countermeasures, longer paths in the logic circuits and larger transistor sizes in the memory structures are shown to be effective ways of compensating the downsides of the Near-Threshold Computing. The results give a basis for low-power IC circuit designing, if the normal supply voltage with no drawbacks should be used, or if reduced voltage levels should be used and the drawbacks tolerated somehow.

http://urn.fi/URN:NBN:fi-fe201304082714